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| substrate | thin film | ion implantation |
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| Lithography & Etching | Chemical Mechanical Polishing | Wafer Bonding |
| type | methods, apparatuses | comment | Substrate Size |
| Insulating layer formation | thermal oxidation | ≦10µm | Φ2" to Φ300 |
| Chemical Vapor Deposition | SiO 2, PSG, NSG, etc. | Φ4"、Φ5" | |
| Low‑Pressure Chemical Vapor Deposition | polysilicon, etc. | Φ2" to Φ4", Φ6" | |
| Chemical Vapor Deposition | SiO₂, SiN, a‑Si, etc. | Φ2" to Φ8" | |
| Metal and insulating layer formation | Sputtering (PVD) | Metals, alloys, oxides, nitrides, special materials, etc. | Φ2" to Φ450, ≤650×950 |
| Evaporation | Metals, alloys, oxides, nitrides, special materials, etc. | Φ2" to Φ300, ≤300 x 360 | |
| Electroplating / Electroless plating |
Electroplating: Ni, Cu, Au, SnAg
Electroless plating: Ni, Cu, Au
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≤Φ8", square |
patterning
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Type
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Methods, Equipment
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Comments
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Substrate Size
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Photolithography Process
(Resist Coating, Exposure, Development)
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Spin-coating
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positive photoresist, negative photoresist
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Φ2" to Φ8"
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Contact Aligner
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Capability: >3μm
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Φ2" to Φ8"
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Dual‑sided aligner (G‑line)
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Capability: >1μm
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Φ4"
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Stepper (i‑line)
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Capability: >0.5μm
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Φ4", Φ6"
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Nanoimprinting
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Imprint resist (nanoscale)
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Inquire for details
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Electron Beam Lithography
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Capability: >50nm
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≤Φ6"
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| lift‑off |
Lift‑off
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Capability: >5μm
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Φ2" to Φ8"
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etching
| Type |
Methods, apparatus
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Comments
|
Substrate size
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| Dry etching |
Parallel‑plate RIE
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Silicon etching, quartz etching
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Φ2" to Φ8"
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ICP‑RIE
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Silicon etching, quartz etching
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Φ4", Φ6"
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Deep Reactive Ion Etching of Silicon
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Si (Through‑Hole)
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Φ2" to Φ6"
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Sacrificial Layer Etching
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Silicon, Silicon Dioxide
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Φ2" to Φ6"
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Metal Etching
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Aluminum and Aluminum Alloys
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Φ2" to Φ4"
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| Wet Etching | Tetramethylammonium hydroxide, Potassium hydroxide | Select the appropriate | Φ2" to Φ8" |
| high‑frequency | Φ2" to Φ8" | ||
| Etching of various metal layers | Φ2" to Φ8" |
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Type
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Method, Device
|
Comment
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Substrate Size
|
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Ion Implantation
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Medium‑Current Ion Implantation
High‑Energy Ion Implantation
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More than 60 elements can be used for doping
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Φ3" to Φ6"
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Annealing
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High‑energy high‑speed annealing
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Maximum heating temperature: 1800℃
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≤Φ8"
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Type
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Method, Device
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Comment
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Substrate Size
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| wafer bonding |
anodic bonding
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bonding glass and silicon
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≤Φ8"
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Surface-activated bonding
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Capable of bonding different materials together
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Inquire for details
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Type
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Method, Device
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Comment
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Substrate Size
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Wafer Bonding
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Chemical Mechanical Polishing
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Metals: Au, Pt, Cu, etc.
Oxides: TEOS, SiO₂, etc.
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.Φ2" to Φ300, square
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Type
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Method, Device
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Comment
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Substrate Size
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| Surface Analysis | SIMS, ESCA, TEM, etc. | Various Contract Analysis Services | Ask for details |
| Observe the shape of a very small area under a microscope | |||
| Thermal analysis |







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